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LNAs with Step Attenuator and VGA
Typical Operating Circuits
2.775 V DC
1.1k Ω
PRECISION
GND
RF_V CC
RSET
AGC_BYP
RF
INPUT MATCH
LNA_IN
MAX2371
MAX2373
LNA_V CC
LNA_E
RF
ATTENUATOR
LNA
AGC
AMP
LNA_OUT
RX_EN
EXPONENTIAL
CONVERTER
RF_ATTN
AGC
LNA_I
Impedance-Matching Network Layout
The input- and output-matching networks are sensitive to
layout-related parasitic inductions. To minimize parasitic
TRANSISTOR COUNT: 360
Chip Information
inductance, keep traces short and place components as
close as possible to the chip. To minimize parasitic
capacitance, minimize the area of the plane.
Revision History
Pages changed at Rev 1: 1, 8, 10
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
_____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
? 2006 Maxim Integrated Products
is a registered trademark of Maxim Integrated Products, Inc.
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